Many semiconductor circuits can be damaged by the improper application of voltage to the devices thereof. Field Effect Transistor devices are particularly sensitive to the application of a substantial positive voltage without the application of a balancing negative voltage. However, these devices are not as sensitive in the case where application of a negative voltage is effected without a compensating positive voltage. It is, therefore, desirable to arrange for the application of a negative voltage to the circuit both before application of a positive voltage and after removal of the positive voltage.
In an FET integrated circuit memory which employs both negative and positive voltage sources, the negative voltage is used to reverse bias the FET substrate. If the negative voltage is not available before the positive voltage, excessive current drain may occur in the FET device. Excessive current drain in the FET integrated circuit device can permanently damage the device. In voltage/time sensitive circuits it is often necessary to sequence the voltages to prevent spurious oscillations or erroneous timing signals from occurring.
Past attempts to resolve this problem have required that both the positive and negative voltages be derived from the same winding of a transformer. This solution is adequate for most applications if the failure occurs in the transformer or in the supply to the transformer, however, it does not ensure protection if the voltage failure occurs at some other point in the circuit. Furthermore, even if the same winding of a transformer is used for all circuit voltages one is still not assured that one voltage will not rise before another.